MSc Ge

1. Temperature Sensors Incorporated into a CMOS Image Sensor with Column Zoom ADCs
   Shuang Xie; Xiaoliang Ge; Albert Theuwissen;
   In 2019 IEEE International Symposium on Circuits and Systems (ISCAS),
   IEEE, May 2019. DOI: 10.1109/iscas.2019.8702321
   
   Abstract: ...

   This paper proposes an array of nMOS based temperature sensors incorporated into a CMOS image sensor (CIS) for thermal compensation of the latter. Each temperature sensor features the same area as that of an image pixel. Both the temperature and the image sensors' outputs are read out by the column-level zoom ADCs, each of which offers 16 bits, with a 4-bit unit capacitor array (UCA) SAR and a 13-bit 2 nd -order incremental delta-sigma ADC (DSADC) as the first and the second stage, respectively. The proposed UCA with improved switching and decoding technique minimizes capacitor area and switching energy, by 50% and 75%, respectively, compared to a conventional binary weight array (BWA) counterpart. The column zoom ADC samples twice as fast while keeping its linearity, or, expands the dynamic range by 15 dB, for the image sensors, compared to a DSADC only alternative. To digitize the temperature sensor, the proposed zoom ADC is capable of quantization errors less than 16 μV, which is equivalent to a 0.125 °C resolution for a 130 μV/°C temperature coefficient. The proposed temperature sensor is simulated to keep its errors within ±0.21 °C upon 2 nd -order curve fitting, with 3 sigma Monte Carlo inaccuracies less than ±0.74 °C, between 0 and 100 °C, at a power and an area of 144 μW and 121 μm 2 , respectively, with a sampling period of 64 μs.

2. A 0.5e-rms temporal noise CMOS image sensor with Gm-Cell-Based pixel and period-controlled variable conversion gain
   X. Ge; A.J.P. Theuwissen;
   IEEE transactions on electron devices,
   Volume 64, Issue 12, pp. 5019-5026, October 2017. DOI: 10.1109/TED.2017.2759787
   
   Abstract: ...

   A deep subelectron temporal noise CMOS image sensor (CIS) with a Gm-cell based pixel and a correlated-double charge-domain sampling technique has been developed for photon-starved imaging applications. With the proposed technique, the CIS, which is implemented in a standard 0.18-µm CIS process, features pixel level amplification and achieves an input-referred noise of 0.5 e−rms with a correlated double sampling period of 5 µs and a row read-out time of 10 µs. The proposed structure also realizes a variable conversion gain (CG) with a period controlled method. This enables the read-out path CG and the noise-equivalent number of electrons to be programmable according to the application without any change in hardware. The experiments show that the measured CG can be tuned from 50 µV/e- to 1.6 mV/e- with a charging period from 100 ns to 4 µs. The measured characteristics of the prototype CIS are in a good agreement with expectations, demonstrating the effectiveness of the proposed techniques.
   
   document

3. A 0.5e- temporal noise CMOS image sensor with charge-domain CDS and period-controlled variable conversion gain
   X Ge; A Theuwissen;
   In International image sensor workshop,
   pp. 290-293, June 2017.
   
   Abstract: ...

   This paper introduces a proof-of-concept low-noise CMOS image sensor (CIS) intended for photon-starved imaging applications. The proposed architecture is based on a charge-sampling pixel featuring in-pixel amplification to reduce its input referred noise. With the proposed technique, the structure realizes a period-controlled variable conversion factor at pixel-level. This enables the conversion factor and the noise-equivalent number of electrons to be tunable according to the application without any change in hardware. The obtained noise performance is comparable to the state-of-the-art low noise CIS, while this work employs a simpler circuit, without suffering from dynamic range limitations. The device is fabricated in a low-cost, standard CIS process.
   
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4. A potential-based characterization of the transfer gate in CMOS image sensors
   Y. Xu; X. Ge; A.J.P. Theuwissen;
   IEEE Transactions on Electron Devices,
   Volume 63, Issue 1, pp. 42-48, 2016.

5. A CMOS image sensor with nearly unity-gain source follower and optimized column amplifier
   X. Ge; A. Theuwissen;
   In E. Fontana; C. Ruiz-Zamarreno (Ed.), 2016 IEEE SENSORS,
   IEEE, pp. 1-3, 2016. DOI: 10.1109/ICSENS.2016.7808589
   
   Abstract: ...

   This paper presents a CMOS image sensor with in-pixel nearly unity-gain pMOS transistor based source followers and optimized column-parallel amplifiers. The prototype sensor has been fabricated in a 0.18 μm CMOS process. By eliminating the body effect of the source follower transistor, the voltage gain for the pixel-level readout circuitry approaches unity. The use of a single-ended common-source cascode amplifier with ground rail regulation improves the PSRR of the column-parallel analog front-end circuitry and further the noise performance. Electrical characterization results show that the proposed pixel improves the conversion gain after the in-pixel source follower by 42% compared to that of the conventional structure. The prototype sensor with proposed readout architecture reaches a 1.1e- input-referred temporal noise with a column-level ×16 analog gain.
   
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6. A comparative noise analysis and measurement for n-type and p-type pixels with CMS technique
   X. Ge; B. Mamdy; A.J.P. Theuwissen;
   In A. Darmont; R. Widenhorn (Ed.), IS&T International Symposium on Electronic Imaging,
   Society for Imaging Science and Technology, pp. IMSE-261, 2016.

7. Investigating transfer gate potential barrier by feed-forward effect measurement
   Y. Xu; X. Ge; A.J.P. Theuwissen;
   In P. Magnan (Ed.), Proceedings of the International Image Sensor Workshop,
   International Image Sensor Society, pp. 116-120, 2015.

8. A single-trim CMOS bandgap reference with a 3σ inaccuracy of ±0.15% from -40°C to 125°C
   G. Ge; C. Zhang; G. Hoogzaad; K.A.A. Makinwa;
   IEEE Journal of Solid State Circuits,
   Volume 46, Issue 11, pp. 2693-2701, November 2011.

9. A single-trim CMOS bandgap reference with a 3-sigma inaccuracy of ±0.15% from ¿40°C to 125°C
   G. Ge; Ch Zhang; G. Hoogzaad; K.A.A. Makinwa;
   In LC Fujino (Ed.), 2010 IEEE International Solid-State Circuits Conference; Digest of technical papers (ISSCC) 2010,
   IEEE, pp. 78-79, 2010.

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